<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<raConfiguration version="7">
  <generalSettings>
    <option key="#Board#" value="board.custom"/>
    <option key="CPU" value="RA6T2"/>
    <option key="Core" value="CM33"/>
    <option key="#TargetName#" value="R7FA6T2BD3CFP"/>
    <option key="#TargetARCHITECTURE#" value="cortex-m33"/>
    <option key="#DeviceCommand#" value="R7FA6T2BD"/>
    <option key="#RTOS#" value="_none"/>
    <option key="#pinconfiguration#" value="R7FA6T2BD3CFP.pincfg"/>
    <option key="#FSPVersion#" value="4.4.0"/>
    <option key="#SELECTED_TOOLCHAIN#" value="gcc-arm-embedded"/>
    <option key="#ToolchainVersion#" value="10.3.1.20210824"/>
  </generalSettings>
  <raBspConfiguration/>
  <raClockConfiguration>
    <node id="board.clock.xtal.freq" mul="24000000" option="_edit"/>
    <node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
    <node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
    <node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
    <node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
    <node id="board.clock.pll.div" option="board.clock.pll.div.2"/>
    <node id="board.clock.pll.mul" option="board.clock.pll.mul.200"/>
    <node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
    <node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
    <node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
    <node id="board.clock.pll2.mul" option="board.clock.pll2.mul.100"/>
    <node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
    <node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
    <node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
    <node id="board.clock.scispiclk.source" option="board.clock.scispiclk.source.pll"/>
    <node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.pll"/>
    <node id="board.clock.gptclk.source" option="board.clock.gptclk.source.disabled"/>
    <node id="board.clock.iicclk.source" option="board.clock.iicclk.source.disabled"/>
    <node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
    <node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
    <node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
    <node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
    <node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
    <node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
    <node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
    <node id="board.clock.scispiclk.div" option="board.clock.scispiclk.div.2"/>
    <node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
    <node id="board.clock.gptclk.div" option="board.clock.gptclk.div.2"/>
    <node id="board.clock.iicclk.div" option="board.clock.iicclk.div.1"/>
    <node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
    <node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
    <node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
    <node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
    <node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
    <node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
    <node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
    <node id="board.clock.scispiclk.display" option="board.clock.scispiclk.display.value"/>
    <node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
    <node id="board.clock.gptclk.display" option="board.clock.gptclk.display.value"/>
    <node id="board.clock.iicclk.display" option="board.clock.iicclk.display.value"/>
  </raClockConfiguration>
  <raPinConfiguration>
    <pincfg active="true" name="" symbol="">
      <configSetting altId="adc12.an015.pc03" configurationId="adc12.an015"/>
      <configSetting altId="canfd0.crx0.pa12" configurationId="canfd0.crx0" isUsedByDriver="true"/>
      <configSetting altId="canfd0.ctx0.pa11" configurationId="canfd0.ctx0" isUsedByDriver="true"/>
      <configSetting altId="gpt4.gtioc4a.pe10" configurationId="gpt4.gtioc4a" isUsedByDriver="true"/>
      <configSetting altId="gpt4.gtioc4b.pe13" configurationId="gpt4.gtioc4b" isUsedByDriver="true"/>
      <configSetting altId="jtag_fslash_swd.tck.pa14" configurationId="jtag_fslash_swd.tck"/>
      <configSetting altId="jtag_fslash_swd.tdi.pa15" configurationId="jtag_fslash_swd.tdi"/>
      <configSetting altId="jtag_fslash_swd.tdo.pb03" configurationId="jtag_fslash_swd.tdo"/>
      <configSetting altId="jtag_fslash_swd.tms.pa13" configurationId="jtag_fslash_swd.tms"/>
      <configSetting altId="pa08.output.high" configurationId="pa08"/>
      <configSetting altId="pd01.output.high" configurationId="pd01"/>
      <configSetting altId="pd03.output.high" configurationId="pd03"/>
      <configSetting altId="pd04.output.low" configurationId="pd04"/>
      <configSetting altId="pe11.output.low" configurationId="pe11"/>
      <configSetting altId="pe12.output.high" configurationId="pe12"/>
      <configSetting altId="pe15.output.high" configurationId="pe15"/>
      <configSetting altId="sci1.rxd1.pd09" configurationId="sci1.rxd1" isUsedByDriver="true"/>
      <configSetting altId="sci1.txd1.pd08" configurationId="sci1.txd1" isUsedByDriver="true"/>
      <configSetting altId="sci9.rxd9.pd06" configurationId="sci9.rxd9" isUsedByDriver="true"/>
      <configSetting altId="sci9.txd9.pd05" configurationId="sci9.txd9" isUsedByDriver="true"/>
    </pincfg>
  </raPinConfiguration>
</raConfiguration>
